A design can contain EDIF files generated by:
• Synthesis tools
• Schematic text editors
• Any other design entry mechanism
These modules must be instantiated to be connected to the rest of the design.
Use BLACK_BOX instantiation in the HDL source code.
Vivado synthesis lets you apply specific constraints to these BLACK_BOX instantiations.
After you make a design a BLACK_BOX , each instance of that design is a BLACK_BOX .
Download the coding example files from Coding Examples .