Processing System - 2022.2 English

Power Design Manager User Guide (UG1556)

Document ID
Release Date
2022.2 English

Versal® ACAP has a feature-rich 64-bit dual-core Arm® Cortex®-A72 and dual-core Arm Cortex®-R5F based processing system (PS).

Power Domains

The processing system is divided into Low Power Domain (LPD) and Full Power Domain (FPD). FPD can be powered up/down based upon design power requirements. PMC can also be configured from PS tab.

Figure 1. Low Power Domain (LPD)

Figure 2. Full Power Domain


PMC clock frequency is fixed and is dependent on device speed grade. Load can be configured within the range of 0-100%.

Figure 3. PMC