I/O Interfaces - 2022.2 English

Power Design Manager User Guide (UG1556)

Document ID
UG1556
Release Date
2022-10-19
Version
2022.2 English

I/O interfaces are bank wise configurable. The maximum number of I/O pins per bank is 26. The bottom row of the each GPIO Bank table displays the available number of GPIO's for each bank. After some GPIO configuration it shows 0 , which signifies all the I/O's of the particular bank is already used. If configured, I/Os exceeds I/Os available in the bank, it will give a DRC and you should use the GPIOs in other banks.

Figure 1. GPIOs available after Selection of Interfaces

GPIO Bank voltage can be configured from IO banks.

Figure 2. Voltage Selections

Note: Power section in the above table only reports power on VCCO_50x IO's and IO power in VCC_PSLP is not reported in this table.