Creating Clocks - 2022.2 English

Power Design Manager User Guide (UG1556)

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2022.2 English

The clocks must be created/generated before starting a manual estimation flow. This enables the clocks to be selected from the other resources tabs.

This clock creation can be performed using the Clock wizard from the Clock tab.

PDM has a create clock wizard to create clocks. This wizard allows creating internal (clocks coming from another block such as PS or GT) as well external clocks (clocks coming from an I/O pin).

Fill in the details on the Clock tab to create a clock. Select if it is an external (coming from an I/O pin) or internal, from another block, such as the processing subsystem (PS) or a GT recovered clock, for example.

Figure 1. Creating Clock Wizard
Figure 2. Clock Wizard

Figure 3. Clock Tab

The fanout field for that clock will get populated automatically based on how many registers, block RAM, URAMs, and other resources are connected to that clock on their respective tabs.

Power Tip: Using this approach for the clock entry, PDM can accurately estimate the clock power as the clock fanout is updated every time a clock is used in a Resources tab.

If power estimation is required for an MMCM or PLL, these can be specified in the Clock Managers section on the Clock tab.

You can configure Clock Managers, MMCM, XPLL, DPLL from the clock wizard. PDM automatically creates unique instance names for different clock managers. The reference clock  for clock managers can be specified by selecting the previously created clocks. If the reference clock is not explicitly specified then current external/internal clock in the clock configuration wizard is used as the reference clock for the given clock manager. Clock wizard in PDM allows selecting three different VCO range for clock managers. VCO range is used to identify the optimum D and M values for PLLs.

Figure 4. Clock Managers

Once the clock is created, it is available in the Clock table and is selectable on the other resource tabs such as Logic, DSP, URAM, block RAM, and I/O tabs to estimate the power of these blocks and the power of the clock network.