SysgenPortDescriptor Member Variables - 2022.2 English

Vitis Model Composer User Guide (UG1483)

Document ID
UG1483
Release Date
2023-01-13
Version
2022.2 English
Type Member Description
String name Tells the name of the port.
Integer simulinkPortNumber Tells the index of this port in SimulinkĀ® . Indexing starts with 1 (as in Simulink).
Boolean typeKnown True if this port's type is known, and false otherwise.
String type Type of the port, such as UFix_<n>_<b>, Fix_<n>_<b>, or Bool.
Boolean isBool True if port type is Bool, and false otherwise.
Boolean isSigned True if type is signed, and false otherwise.
Boolean isConstant True if port is constant, and false otherwise.
Integer width Tells the port width.
Integer binpt Tells the binary point position, which must be an integer in the range 0..width.
Boolean rateKnown True if the rate is known, and false otherwise.
Double rate Tells the port sample time. Rates are positive integers expressed as MATLABĀ® doubles. A rate can also be infinity, indicating that the port outputs a constant.