Setting up the Tool to Generate an Image File for Hardware Validation Flow - 2022.2 English

Vitis Model Composer User Guide (UG1483)

Document ID
UG1483
Release Date
2023-01-13
Version
2022.2 English
  1. Choose a platform. In the Vitis Model Composer Hub block, select the Hardware Selection tab on the left and open the hardware selector menu as shown in the following figure.

  2. Select the Platform tab from the top and browse to select either a platform that ships with the product or a custom platform.

  3. Select the subsystem containing HDL and/or AI Engine blocks for which to perform hardware validation. Select the Hardware Flow tab and the Generate Hardware Validation Code check box.

  4. Under HW System Type, choose between Baremetal and Linux. For each selection, you can choose between hardware or hardware emulation using the Target drop-down menu.

    Note: For Linux applications only, further information is required (see the following figure). This is a once-only action. Use the following steps to obtain the necessary information.

    1. Click here to download the Versal common image. Unzip the download and specify the directory in the Common SW Dir field.
    2. Switch to bash shell and source sdk.sh in the common image directory. This will prompt for a target directory path for the SDK. Extracting the SDK will take about ten minutes. Specify the SDK directory in the Target SDK Dir field.
  5. Click Generate. Depending on your settings and the complexity of your design, generation can take up to one hour. Subsequent generation can be much faster if changes to the design do not cause a change in the PL. For example if you simply increase the simulation time in Simulink (to collect more data), change the data source, or make modifications to the AI Engine kernel, the subsequent image generations will be faster.