The following are recommended for using the Resource Analyzer to optimize resource utilization in the design:
- For quicker resource analysis iterations, post-synthesis analysis is preferred over post-implementation analysis.
- After logic optimization during the Vivado Synthesis process the tool does not keep information about
merged logic in the Vivado database. Merged and
shared logic may make it difficult to accurately cross probe from Vivado resource data to the Simulink model. Hence, it is recommended that you create a custom
Vivado Synthesis strategy to control merged
and shared logic.
For information about how to create a custom Synthesis strategy in Vivado IDE, see this link in the Vivado Design Suite User Guide: Using the Vivado IDE (UG893).
To control merged and shared logic in the Vivado IDE, make the following changes to the default Vivado Synthesis strategy.
- In Vivado IDE:
- Select the Synthesis option
-keep_equivalent_registers
. - Set the Synthesis option
-resource_sharing
to the valueoff
.
- Select the Synthesis option
- Save the new Synthesis strategy and exit Vivado IDE.
- In Vitis Model Composer, select the new custom Synthesis Strategy in the Model Composer Hub dialog box (HDL Settings tab) before generating the design.
- In Vivado IDE: