Model Composer HDL Blocksets - 2022.2 English

Vitis Model Composer User Guide (UG1483)

Document ID
UG1483
Release Date
2023-01-13
Version
2022.2 English

A Simulink® blockset is a library of blocks that can be connected in the Simulink block editor to create functional models of a dynamical system. For system modeling, Model Composer HDL library blocksets are used like other Simulink blocksets. The blocks provide abstractions of mathematical, logical, memory, and DSP functions that can be used to build sophisticated signal processing (and other) systems. There are also blocks that provide interfaces to other software tools (for example, FDATool, Questa) as well as the Model Composer code generation software.

Model Composer HDL blocks are bit-accurate and cycle-accurate. Bit-accurate blocks produce values in Simulink that match corresponding values produced in hardware; cycle-accurate blocks produce corresponding values at corresponding times.

Xilinx HDL Blockset

The Xilinx® HDL Blockset is a family of libraries that contain basic Model Composer HDL blocks. Some blocks are low-level, providing access to device-specific hardware. Others are high- level, implementing (for example) signal processing and advanced communications algorithms. The libraries are described in the following table.

Table 1. HDL Blockset Libraries
Library Description
Basic Elements Standard building blocks for digital logic.
DSP Digital signal processing (DSP) blocks.
Interfaces Blocks that support connection with Simulink blocks.
Logic and Bit Operations Blocks for performing logic and bit operations.
Memory Blocks that implement and access memories.
Signal Routing Blocks that support Routing signals.
Sources Blocks that generate signal data
Tools “Utility” blocks. For example, code generation (Vitis Model Composer Hub block), resource estimation, HDL co-simulation, etc.
User-Defined functions Blocks that support importing custom functions.