HDL Netlist Compilation - 2022.2 English

Vitis Model Composer User Guide (UG1483)

Document ID
UG1483
Release Date
2023-01-13
Version
2022.2 English

The HDL Netlist compilation type produces HDL files that implement the design. More details regarding the HDL Netlist compilation flow can be found in the Compilation Results section.

As shown in the following figure, you can select HDL Netlist compilation by selecting it from the Compilation Type menu on the HDL Settings tab.

Figure 1. HDL Netlist

The HDL Netlist compilation can be performed for any of the boards or parts your Vivado tools support. In addition to accessing the Xilinx development boards installed as part of your Vivado installation, you can also specify Partner boards or custom boards (see Specifying Board Support in Model Composer HDL Blockset).

The files generated as part of an HDL Netlist compilation are placed in an hdl_netlist subdirectory under the directory you specified in the Code directory field. These files are described in the Compilation Results section.