Buffer Location - 2022.2 English

Vitis Model Composer User Guide (UG1483)

Document ID
UG1483
Release Date
2023-01-13
Version
2022.2 English
The AI Engine compiler attempts to automatically allocate buffers for windows, lookup tables, and runtime parameters in the most efficient manner possible. However, you might want to explicitly control their placement in memory. Similar to the kernels shown previously in this section, buffers inferred on a kernel port can also be constrained to be mapped to specific tiles, banks, or even address offsets using location constraints.

  • By default, the option Specify Buffer Location is deselected. When you enable this option, the kernel ports that can be constrained are displayed. Buffer locations are only allowed on window kernel ports.
  • You can click on each individual port and enable constraint as shown in the following figure.
  • You can use the Allocation option to specify a single or double buffer constraint on a window port. By default, a window port is double buffered.
  • For a single buffer allocation, you can choose to constrain the buffer location by pointing to a:
    • Specific data memory bank on an AI Engine tile. The bank ID is relative to the tile and can take values 0,1,2,3.
    • Specific data memory address on an AI Engine tile. The offset address is relative to the tile starting at zero with a maximum value of 32768 (32K).
    • Specific data memory address offset. The offset address is between 0 and 32768 (32K) and is relative to a tile allocated by the compiler.
    • Specific buffer location to be on the same bank as that of one or more other port buffers. This ensures that the buffer can be accessed by other kernel without requiring a DMA.


  • You can constrain the location of double buffers attached to a port that are to be placed on a specific address or a bankid.


Important: The non-collocation constraint (i.e., specifying where the buffer should not be mapped to) is allowed only for single buffer.