AIE to HLS Kernel - 2022.2 English

Vitis Model Composer User Guide (UG1483)

Document ID
UG1483
Release Date
2023-01-13
Version
2022.2 English
The AIE to HLS Kernel block reformats a signal driven by an AI Engine Kernel block or an AI Engine kernel output port is of type cint16 and the HLS kernel is of type graph block, so that the resulting signal matches the data type ap_axis<64>, you would use an AIE to HLS kernel block with parameter output type set to ap_axis<64>. This block reads cint16 samples from its input and then packs pairs of subsequent cint16 samples into ap_axis<64> samples to its output.
Figure 1. AIE to HLS Kernel Block

Double-click the block symbol to see the parameters of the AIE to HLS Kernel block. For more information refer to AIE to HLS.

Output Type
Possible values are: ap_axis<32>, ap_axis<64>, ap_axis<128>, ap_axiu<32>, ap_axiu<64>, ap_axiu<128>, ap_int<32>, ap_int<64>, ap_uint<32>, ap_uint<64>,int, long long, unsigned, unsigned long long.
Output Size
The size of the output port. The output port is a variable sized signal whose maximum size is specified by the OutputSize parameter. Default Output Size is 1.