Synthesis Attributes - 2022.2 English

Versal ACAP Hardware, IP, and Platform Development Methodology Guide (UG1387)

Document ID
UG1387
Release Date
2022-11-16
Version
2022.2 English

Synthesis attributes allow you to control the logic inference in a specific way. Although synthesis algorithms are set to give the best results for the largest number of designs, there are often designs with differing requirements. In this case, you can use attributes to alter the design to improve QoR. For information on the attributes supported by synthesis, see the Vivado Design Suite User Guide: Synthesis (UG901).

Note: Before retargeting your design to a new device, Xilinx recommends reviewing any synthesis attributes from previous design runs that target older devices.

When using the KEEP, DONT_TOUCH, and MAX_FANOUT attributes, be aware of the special considerations described in the following sections.