Important Files - 2022.2 English

Vitis Networking P4 User Guide (UG1308)

Document ID
UG1308
Version
2022.2 English
Revision
There are three files from the example design testbench that are relevant to DPI:
  • Precompiled DPI library
  • Example design SystemVerilog package file
  • Testbench Control block

When the example design is generated, the precompiled DPI library can be found in the following location:

/<proj_location>/vitis_net_p4_0_ex/imports/vitis_net_p4_drv_dpi.so

This precompiled shared object (.so) file contains:

  • The control plane drivers for the CAMs, for example, XilVitisNetP4BcamInsert().
  • A set of utility functions specific to supporting the use of the control plane drivers inside a SystemVerilog simulation. The names of all such functions start with "XilVitisNetP4Dpi", for example, XilVitisNetP4DpiCreateEnv().

The following SystemVerilog package files are also generated and can be found at the following locations:

/<proj_location>/vitis_net_p4_0_ex/vitis_net_p4_0_ex.gen/sources_1/ip/vitis_net_p4_0/src/hw/simulation/vitis_net_p4_dpi_pkg.sv

/<proj_location>/vitis_net_p4_0_ex/vitis_net_p4_0_ex.gen/sources_1/ip/vitis_net_p4_0/src/verilog/vitis_net_p4_0_pkg.sv

The first package contains a declaration of all the DPI functions provided by the library. The second package has a number of functions and tasks including the specific configurations from the P4 program. These package files should be referenced to understand which functions are present in the DPI library and what parameters they accept.

The control block of the testbench is where the DPI library is used in practice, and it is found at the following location:

/<proj_location>/vitis_net_p4_0_ex/vitis_net_p4_0_ex/imports/example_control.sv

The control block is a useful reference for users who wish to develop their own testbench, as it illustrates in practice how to use the functions provided by the DPI library, which is described in further detail in the next section.