Clocks - 2022.2 English

Vitis Networking P4 User Guide (UG1308)

Document ID
UG1308
Version
2022.2 English
Revision
The frequencies of the Vitis Networking P4 IP interface clocks are not fixed, they can be defined by the user. The following are some guidelines to follow:
  • Set the AXI4-Lite clock (s_axi_aclk) frequency to 100 MHz or below, to ensure reliable timing closure.
  • Set the AXI4-Stream clock (s_axis_aclk) frequency to 300 MHz or below, to ensure reliable timing closure.
  • The CAM Memory clock (cam_mem_aclk) must be derived from the same clock source as the AXI4-Stream clock. It can be any value up to a maximum of 600 MHz.