CAMS - 2022.2 English - UG1308

Vitis Networking P4 User Guide (UG1308)

Document ID
UG1308
Version
2022.2 English
Revision

If a higher-rate CAM Memory clock signal can be provided at multiples of the required packet rate, that will allow for TDM within the CAM IP and potentially reduce logic and RAM resources.

Reducing the required Packet Rate parameter can also help to reduce the logic and RAM resources of the CAMs.

Other approaches to reduce the resource utilisation of CAM tables include:
  • Reducing the size (number of entries supported)
  • Reducing the num_masks parameter value (where applicable)