FPGA Manager Configuration and Usage for Zynq-7000 Devices and Zynq UltraScale+ MPSoC - 2022.2 English

PetaLinux Tools Documentation: Reference Guide (UG1144)

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2022.2 English
The FPGA manager provides an interface to Linux for configuring the programmable logic (PL). It packs the dtbos and bitstreams into the /lib/firmware/xilinx directory in the root file system.

After creating a PetaLinux project for Zynq UltraScale+ MPSoC, follow these steps to build the FPGA manager support:

  1. Go to cd <plnx-proj-root>.
  2. In the petalinux-config command, select FPGA Manager > [*] Fpga Manager.
    Note: The PetaLinux FPGA manager configuration performs the following:
    1. Generates the pl.dtsi nodes as a dt overlay (dtbo).
    2. Packs the dtbos and bitstreams in the .bin format into the /lib/firmware/xilinx/base directory in the root file system.
    3. Use the pl-custom.dtsi(<plnx-proj-root>/project-spec/meta-user/recipes-bsp/device-tree/files/pl-custom.dtsi) file to add or modify the PL nodes in pl.dtsi generated using the base XSA file. These changes reflect when the Device tree overlay/FPGA manager is enabled in petalinux-config.
  3. Specify extra hardware files directory path in FPGA Manager > Specify hardware directory path.
    Note: This step is optional. It is required only if multiple bitstreams for same PS and the corresponding dtbos have to be packed into the root file system. It generates and packs the bitstream in .bin form and its dtbo in the RootFS in the /lib/firmware/xilinx/<XSA name> folder. Ensure that the PS design is the same for XSA in the hardware directory path and <plnx-proj-root>/project-spec/hw-description/<system.xsa>.
    1. You can customize the DT nodes defined in the hardware file provided in the FPGA manager hardware path. For example, if you have can.xsa in the hardware directory path, customize the nodes by creating a can.dtsi file and add DT nodes/properties in the same hardware directory path.
  4. You can also use the petalinux-create command to add the PL xsa files into the PetaLinux project. The following command will create the fpgamanager_dtg app with the xsa file to generate the dtsi and bit files.
    petalinux-create -t apps --template fpgamanager_dtg -n can-interface --srcuri <path-to-xsa>/system.xsa --enable
    INFO: Create apps: can-interface
    INFO: Copying source urls into the project directory
    INFO: New apps successfully created in <plnx-proj-root>/project-spec/meta-user/recipes-apps/can-interface
    INFO: Enabling created component...
    INFO: Sourcing build environment
    INFO: Silentconfig rootfs
    INFO: can-interface has been enabled
    Note: For each XSA, create a separate app using the previous command. FPGA manager should be enabled in petalinux-config for both fpgamanager and fpgamanager_dtg template apps.
  5. Run petalinux-build.

Example loading full bitstream on target:

root@xilinx-zcu102:~# fpgautil -o /lib/firmware/xilinx/base/pl.dtbo -b 

Time taken to load DTBO is 239.000000 milli seconds. DTBO loaded through ZynqMP FPGA manager successfully.

See the petalinux-package command for generating BOOT.BIN.

Loading a full bitstream through sysfs – loading bitstream only:

root@xilinx-zcu102-2022_2:~# fpgautil  -b /mnt/design_1_wrapper.bit.bin

Time taken to load BIN is 213.000000 milli seconds. BIN FILE loaded through zynqMP FPGA manager successfully.

See help section for more option: root@xilinx-zcu102-2020_1:~# fpgautil -h. For more information, see https://www.wiki.xilinx.com/Solution+ZynqMP+PL+Programming.

Figure 1. FPGA Manager