Zynq User-Configurable PL BBRAM Parameters - 2022.2 English

Xilinx Standalone Library Documentation: BSP and Libraries Document Collection (UG643)

Document ID
UG643
Release Date
2022-10-19
Version
2022.2 English

The table below lists the MIO pins for Zynq PL BBRAM JTAG operations.

The table below lists the MUX selection pin for Zynq BBRAM PL JTAG operations.

Note: The pin numbers listed in the table below are examples. You must assign appropriate pin numbers as per your hardware design.
Pin Name Pin Number
XSK_BBRAM_MIO_JTAG_TDI (17)
XSK_BBRAM_MIO_JTAG_TDO (21)
XSK_BBRAM_MIO_JTAG_TCK (19)
XSK_BBRAM_MIO_JTAG_TMS (20)
Pin Name Pin Number
XSK_BBRAM_MIO_JTAG_MUX_SELECT (11)