The Vitis™ Unified Software Development Environment provides a variety of Xilinx® software packages, including device drivers, libraries, board support packages to help you develop a software platform in baremetal and RTOS based environment. This document describes these software packages in details, including API description. The Vitis™ Unified Software Development Environment also provides the FreeRTOS kernel along with low level software needed for the kernel to work on Xilinx supported processors ( MicroBlaze™ , Cortex A9, Cortex R5, Cortex A53, Cortex A72). The documentation is listed in the following table; click the name to open the document.
| Library Name | Summary |
|---|---|
| Xilinx Standard C Libraries | Describes the software libraries available for the embedded processors. |
| Standalone Library v8.0 | Describes the Standalone platform, a single-threaded, simple
operating system (OS) platform that provides the lowest layer of software
modules used to access processor-specific functions. Some typical functions offered by the Standalone platform include setting up the interrupts and exceptions systems, configuring caches, and other hardware specific functions. The Hardware Abstraction Layer (HAL) is described in this document. |
| LwIP 2.1.1 Library v1.8 | Describes the SDK port of the third party networking library, Light Weight IP (lwIP) for embedded processors. |
| XilFlash Library v4.9 | Provides read/write/erase/lock/unlock features to access a parallel flash device. |
| XilFFS Library v4.8 | XilFFS is a generic FAT file system that is primarily added for use with SD/eMMC driver. The file system is open source and a glue layer is implemented to link it to the SD/eMMC driver. |
| XilSecure Library v4.9 | Provides APIs to access secure hardware on the Zynq® UltraScale+™ MPSoCs. |
| XilSkey Library v7.3 | Provides a programming mechanism for user-defined eFUSE
bits and for programming the KEY into battery-backed RAM (BBRAM) of Zynq SoC, provides
programming mechanisms for eFUSE bits of
UltraScale™
devices. The library also provides programming mechanisms for eFUSE bits and BBRAM key of the Zynq UltraScale+ MPSoCss. |
| XilPM Library v4.1 | The Zynq UltraScale+ MPSoC and
Versal®
ACAP power management framework is a set
of power management options, based upon an implementation of the extensible
energy management interface (EEMI). The power management framework allows software components running across different processing units (PUs) on a chip or device to issue or respond to requests for power management. |
| XilFPGA Library v6.3 | Provides an interface to the Linux or bare-metal users for configuring the programmable logic (PL) over PCAP from PS. The library is designed for Zynq UltraScale+ MPSoC and Versal ACAP to run on top of Xilinx® standalone BSPs. |
| XilMailbox Library v1.7 | Provides the top-level hooks for sending or receiving an inter-processor interrupt (IPI) message using the Zynq UltraScale+ MPSoC and Versal ACAP IPI hardware. |
| XilSEM Library v1.6 | The Xilinx Soft Error Mitigation (XilSEM) library is a pre-configured, pre-verified solution to detect and optionally correct soft errors in Configuration Memory of Versal ACAPs. |
| XilTimer Library v1.1 | Provides sleep and interval timer functionality, Hardware and Software features which are differentiated using a layered approach. |
About the Libraries
The Standard C support library consists of the newlib, libc, which contains the standard
C functions such as stdio, stdlib, and string routines. The math
library is an enhancement over the newlib math library,
libm, and provides the standard math routines. The
LibXil libraries consist of Xilinx device drivers along with the relevant BSP.
The Hardware Abstraction Layer (HAL) provides common functions related
to register I/O, exception, and cache. These common functions are uniform across
MicroBlaze™
and
Arm®
(
Cortex®
-A9,
Cortex®
-A53,
Cortex®
-A72, and
Cortex®
-R5F) processors. The
Standalone platform document provides some processor specific functions and macros for
accessing the processor-specific features. Most routines in the library are written in C
and can be ported to any platform. User applications must include appropriate headers
and link with required libraries for proper compilation and inclusion of required
functionality. These libraries and their corresponding include files are created in the
processor \lib and \include directories, under the current project, respectively. The
-I and -L options
of the compiler being used should be leveraged to add these directories to the search
paths.
Library Organization
Your application can interface with the components in a variety of ways. The libraries are independent of each other, with the exception of some interactions. The LibXil drivers and the Standalone form the lowermost hardware abstraction layer. The library and BSP components rely on standard C library components. Taking into account some restrictions and implications, which are described in the reference guides for each component, you can mix and match the component libraries.