Xil_ICacheInvalidateRange - 2022.2 English - UG643

Xilinx Standalone Library Documentation: BSP and Libraries Document Collection (UG643)

Document ID
UG643
Release Date
2022-10-19
Version
2022.2 English

Invalidate the instruction cache for the given address range.

If the bytes specified by the address (adr) are cached by the Data cache, the cacheline containing that byte is invalidated. If the cachelineis modified (dirty), the modified contents are lost and are NOT written to system memory before the line is invalidated.

Prototype

void Xil_ICacheInvalidateRange(INTPTR adr, u32 len);

Parameters

The following table lists the Xil_ICacheInvalidateRange function arguments.

Table 1. Xil_ICacheInvalidateRange Arguments
Name Description
adr 32bit start address of the range to be invalidated.
len Length of the range to be invalidated in bytes.

Returns

None.