XPm_ClockGetOneDivider - 2022.2 English

Xilinx Standalone Library Documentation: BSP and Libraries Document Collection (UG643)

Document ID
UG643
Release Date
2022-10-19
Version
2022.2 English

Local function to get one divider (DIV0 or DIV1) of a clock.

Prototype

XStatus XPm_ClockGetOneDivider(const enum XPmClock clk, u32 *const divider, const u32 divId);

Parameters

The following table lists the XPm_ClockGetOneDivider function arguments.

Table 1. XPm_ClockGetOneDivider Arguments
Type Name Description
const enum XPmClock clk Identifier of the target clock
u32 *const divider Location to store the divider value
const u32 divId ID of the divider

Returns

Status of performing the operation as returned by the PMU-FW