The table below lists the user-configurable PL eFUSE parameters for UltraScale devices.
Macro Name | Description |
---|---|
XSK_EFUSEPL_DISABLE_AES_KEY_READ | Default = FALSE TRUE will permanently disable the write to FUSE_AES and check CRC for AES key by programming control bit of FUSE. FALSE will not modify this control bit of eFuse. |
XSK_EFUSEPL_DISABLE_USER_KEY_READ | Default = FALSE TRUE will permanently disable the write to 32 bit FUSE_USER and read of FUSE_USER key by programming control bit of FUSE. FALSE will not modify this control bit of eFuse. |
XSK_EFUSEPL_DISABLE_SECURE_READ | Default = FALSE TRUE will permanently disable the write to FUSE_Secure block and reading of secure block by programming control bit of FUSE. FALSE will not modify this control bit of eFuse. |
XSK_EFUSEPL_DISABLE_FUSE_CNTRL_WRITE | Default = FALSE. TRUE will permanently disable the write to FUSE_CNTRL block by programming control bit of FUSE. FALSE will not modify this control bit of eFuse. |
XSK_EFUSEPL_DISABLE_RSA_KEY_READ | Default = FALSE. TRUE will permanently disable the write to FUSE_RSA block and reading of FUSE_RSA Hash by programming control bit of FUSE. FALSE will not modify this control bit of eFuse. |
XSK_EFUSEPL_DISABLE_KEY_WRITE | Default = FALSE. TRUE will permanently disable the write to FUSE_AES block by programming control bit of FUSE. FALSE will not modify this control bit of eFuse. |
XSK_EFUSEPL_DISABLE_USER_KEY_WRITE | Default = FALSE. TRUE will permanently disable the write to FUSE_USER block by programming control bit of FUSE. FALSE will not modify this control bit of eFuse. |
XSK_EFUSEPL_DISABLE_SECURE_WRITE | Default = FALSE. TRUE will permanently disable the write to FUSE_SECURE block by programming control bit of FUSE. FALSE will not modify this control bit of eFuse. |
XSK_EFUSEPL_DISABLE_RSA_HASH_WRITE | Default = FALSE. TRUE will permanently disable the write to FUSE_RSA authentication key by programming control bit of FUSE. FALSE will not modify this control bit of eFuse. |
XSK_EFUSEPL_DISABLE_128BIT_USER_KEY _WRITE | Default = FALSE. TRUE will permanently disable the write to 128 bit FUSE_USER by programming control bit of FUSE. FALSE will not modify this control bit of eFuse. |
XSK_EFUSEPL_ALLOW_ENCRYPTED_ONLY | Default = FALSE. TRUE will permanently allow encrypted bitstream only. FALSE will not modify this Secure bit of eFuse. |
XSK_EFUSEPL_FORCE_USE_FUSE_AES_ONLY | Default = FALSE. TRUE then allows only FUSE's AES key as source of encryption FALSE then allows FPGA to configure an unencrypted bitstream or bitstream encrypted using key stored BBRAM or eFuse. |
XSK_EFUSEPL_ENABLE_RSA_AUTH | Default = FALSE. TRUE will enable RSA authentication of bitstream FALSE will not modify this secure bit of eFuse. |
XSK_EFUSEPL_DISABLE_JTAG_CHAIN | Default = FALSE. TRUE will disable JTAG permanently. FALSE will not modify this secure bit of eFuse. |
XSK_EFUSEPL_DISABLE_TEST_ACCESS | Default = FALSE. TRUE will disables Xilinx test access. FALSE will not modify this secure bit of eFuse. |
XSK_EFUSEPL_DISABLE_AES_DECRYPTOR | Default = FALSE. TRUE will disables decoder completely. FALSE will not modify this secure bit of eFuse. |
XSK_EFUSEPL_ENABLE_OBFUSCATION_ EFUSEAES | Default = FALSE. TRUE will enable obfuscation feature for eFUSE AES key. |