Vitis Tutorials: Vitis Platform Creation (XD101) - 2022.2 English - Vitis Platform Creation Tutorials - XD101

Document ID: XD101
Release Date: 2022-11-07
Version: 2022.2 English

Vitis Tutorials: Vitis Platform Creation
Design Tutorials
Feature Tutorials
Design Tutorials
Custom Platform Creation Tutorial on MPSoC
Step 1: Create Hardware Platform
Create Base Vivado Project from Preset
Customize System Design for Clock and Reset
Add Interrupt Support
Enable AXI Interfaces for the Platform
Emulation Setup (Optional)
Export Hardware XSA
Fast Track
Next Step
Step 2: Create Vitis Software Platform
Prepare the common images
Create FSBL and PMU firmware
Create the device tree file
Create Vitis Platform
Fast Track
Next Step
Step 3: Test the Platform
Test 1: Read Platform Info
Test 2: Run Vector Addition Application
Fast Track for Vector Addition
Test 3: Run a Vitis-AI Demo
Congratulations
Custom Platform Creation Tutorial on Versal
Step 1: Create a Hardware Platform for Customer's VCK190
Create Vivado project
Config the block
Add constraint file
Review the Versal Extensible Platform Example Part_base Platform Setup
Review the Simulation Model
Export Hardware XSA
Validation the output of step1
Method1: Go through Implementation
Method2: Validate PDI on Hardware
Method3: Create PetaLinux Project and boot up the Linux system (optional)
Fast Track
Next Step
Step 2: Create Vitis Software Platform
Prepare the common images
Create the device tree file
Create Vitis Platform
Validate the output of step2
Fast Track
Next Step
Step 3: Run Application on the Platform
Application1: Run a PL acceleration application
(Optional) Test the Application on Hardware Emulation
Test the Application on Hardware
Application2: Run an AIE + PL acceleration application project
Test the Application on Hardware
(Optional) Test the Application on Hardware Emulation
Frequently Asked Questions
Why can’t my platform boot on hardware?
Why can’t my platform boot on hardware emulation?
Why can’t my platform support hardware emulation?
PLM IPI issue
When is the AIE app and PL kernel being programmed?
Why my AIE system application hangs?
Custom Versal DFX Platform Creation Tutorial
Step 1: Create the Hardware Design
Step 1: Create the Hardware Design
Platform Hardware Submodule Explanation
Memory Subsystem
Control Subsystem
AI Engine Subsystem
Interrupt Subsystem
Clock and Reset
Vivado Design Creation
Project Creation
Memory Subsystem Creation
AXI Control Path, Clock, Reset and Isolation Creation
AI Engine
Interrupt
AXI Address Aperture
Setup Block Design Container (BDC) for DFX
Setup Platform Properties
Export Hardware Emulation XSA
Export Hardware XSA
Platform Hardware Creation Summary
Fast Track
Next Step
References
Step 2: Create the Software Components and the Vitis DFX Platform
Step 2: Create the Software Components and the Vitis DFX Platform
Generating Device Tree
Creating the Vitis Platform
Prepare for Platform Packaging
Generating Static Boot Image
Platform Packaging
Next Step
Fast Track
Step 3: Test the Platform
Step 3: Test the Platform
Test 1: Read Platform Info
Test 2: Test PL kernels on the DFX platform
1a. Create a Vector-Addition application
1b. Test the Application on Hardware Emulation
1c. Test the Application on Hardware
Test 3: Run an AIE + PL acceleration application project
Create an AI Engine and PL System Design
Test the Application on Hardware Emulation
Test the Application on Hardware
Test the reconfiguration feature on hardware
What’s Next
Frequently Asked Questions
Frequently Asked Questions
SError Interrupt on xrt_cu_hls_init
ERROR: [BD 41-2666] NoC BDC Aperture Error: Dead-end aperture.
Custom Kria SOM Platform Creation Example
Step 1: Create the Vivado Hardware Design and Generate XSA
Create Base Vivado Project from Preset
Customize System Design for Clock and Reset
Add Interrupt Support
Enable AXI Interfaces for the Platform
Export Hardware XSA
Next Step
Step 2: Create the Vitis platform
Prepare the common image
Generate software components from the KV260 Starter Kit BSP(Optional)
Generate Device Tree Overlay
Create the Vitis Platform
Next Step
Step 3: Test the Platform
Test 1: Read Platform Info
Test 2: Run Vector Addition Application
Congratulations
Fast Track
Feature Tutorials
Incorporation Stream Interfaces
Kernel Modifications
1. Include necessary file headers.
2. Define the AXI stream data type and add the dds process function
3. Add more ports to the kernel functions
4. Add the declaration of the two ports
4. Add a piece of logic to call the dds process function
License
Host Modifications
1. Include necessary file headers.
2. Create a new cl_mem buffer
3. Bond the buffer with new arguments of the kernel
4. Map the new buffer to a pointer
5. Read data from DDR
6. Save the data into a file
7. Unmap the buffer object
License
PetaLinux Building and System Customization
Prepare the base platform
Create a PetaLinux Project
Customize Root File System, Kernel, Device Tree and U-boot
Update the Device tree
Add EXT4 rootfs support
Build PetaLinux Images
Fast Track

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