These two kernels use HLS to implement 256-bit AXI-to-AXIS and AXIS-to-AXI conversion function. The AXI stream data width 256 matches to those AXI stream port of krnl_aurora, so they can be connected together directly in later linking stage. You can find the source code for the two kernels at ./hls/strm_issue.cpp and ./hls/strm_dump.cpp.
In the example design flow, Vitis command v++ will be used by make tool to compile these two kernels to XO files strm_issue.xo and strm_dump.xo.