Waveform Report - 2022.2 English

Vitis Tutorials: Hardware Acceleration (XD099)

Document ID
XD099
Release Date
2022-12-01
Version
2022.2 English

Vitis can generate a waveform view when running hardware emulation, it displays in-depth details include data transfers between the kernel and global memory and data flow through inter-kernel pipes.

To enable waveform data collection, make sure -g option was used during compilation, and associated switch is turned on at the xrt.ini file, which should be placed at the same directory as the host executable file. We already delivered a working xrt.ini with this tutorial, you can check it under ./sw/build/ directory. For more details, refer to xrt.ini File from Vitis online documentation.

[Emulation]
debug_mode=batch

Let’s take the Hardware Emulation result of rtc_gen_test on U200 card as an example, a run summary file will be automatically generated after emulation has been successfully executed, and it can be opened directly with Vitis Analyzer. Waveform is included at run summary report.

vitis_analyzer rtc_gen_test_hw_emu.xclbin.run_summary
Hardware Emulation Waveform

You can also open the waveform database with the Vivado logic simulator xsim

xsim -gui xilinx_u200_xdma_201830_2-0-rtc_gen_test_hw_emu.wdb 

If you wish to have the simulation waveform opened during the hardware emulation run, change debug_mode to gui at xrt.ini

[Emulation]
debug_mode=gui

Besides waveform, other information delivered with run summary is also valuable for you to profile, optimize and debug your application, please check on Profiling the Application of this tutorial for more details. If you want to understand more detailed information about hardware emulation flow, please refer to Hardware Emulation from Vitis online documentation.

Copyright© 2020 Xilinx