Use the Vitis analyzer to visualize the HLS Synthesis Report. You will need to build the kernel without SOLUTION=1 to generate link_summary; this is not provided as part of tutorial. You can skip this step.
vitis_analyzer $LAB_WORK_DIR/build/single_buffer/kernel_8/hw/runOnfpga_hw.xclbin.link_summary
From the HLS Synthesis Report, you can see that the number of resources increased for LUTs, REG, and BRAM compared to the Bloom4x kernel implementation.
