Next Step - Next Step - 2022.2 English - XD099

Vitis Tutorials: Hardware Acceleration (XD099)

Document_ID
XD099
Release_Date
2022-12-01
Version
2022.2 English

In the next steps, you will experiment with how to achieve the maximum bandwidth using all 32 channels as connectivity but accessing either 1 PC or a group of PCs from a single kernel port and varying the address patterns as transaction size.

Start the next step: HBM Bandwidth Results


Return to Start of Tutorial

Copyright© 2020-2022 Xilinx