Feature Tutorials - Feature Tutorials - 2022.2 English - XD099

Vitis Tutorials: Hardware Acceleration (XD099)

Document_ID: XD099
Release_Date: 2022-12-01
Version: 2022.2 English

Feature Tutorials
Tutorial	Board / Platform	Kernel	XRT APIs	Libraries Used	Highlighted Features	GUI Flow
Getting Started with RTL Kernels	U200	C/C++	Native		RTL kernel	Yes
Mixing C and RTL	U200	RTL + C/C++	OpenCL		Mixed C++ and RTL kernel
Dataflow Debug and Optimization	HLS Part	C/C++	HLS		HLS design and analysis	Yes
Using Multiple DDR Banks	U200	C/C++	Native		DDR bank assignment
Using Multiple Compute Units	U200	C/C++	OpenCL		Multiple Compute Units
Controlling Vivado Implementation	U200	C/C++	OpenCL		Use Vivado in the Vitis flow
Optimizing for HBM	U200 / U50	C/C++	OpenCL		HBM and RAMA IP
Host Memory Access	U250	C/C++	OpenCL		Use Host Memory
Using GT Kernels and Ethernet IPs on Alveo	U200	RTL	Native		Ethernet Subsystem
Enabling FPGA to FPGA P2P Transfer using Native XRT C++ API	U50 / U200	C/C++	Native		PCIe P2P