Vivado Design Suite 7 Series FPGA and Zynq-7000 SoC Libraries Guide (UG953) - 2022.1 English - Describes design elements used in the Vivado® tools, associated with Xilinx® 7 series and Zynq® architectures. Details both UniMacro and Xilinx primitive components, including VHDL and Verilog instantiation code, schematic symbols, truth tables, and other information specific to the design element. - UG953

Document ID

UG953

Release Date

2022-04-20

Version

2022.1 English