Step 5: Build the Design Floorplan - 2022.1 English

Vivado Design Suite Tutorial: Dynamic Function eXchange (UG947)

Document ID
Release Date
2022.1 English

Next, create a floorplan to define the regions for Dynamic Function eXchange.

  1. Select the inst_count instance in the Netlist window. Right-click and select Floorplanning > Draw Pblock and draw a tall narrow box on the left side of the upper left corner of the device. The exact size and shape do not matter at this point, but keep the box within the clock region.

    Make sure that the Pblock is selected in the Device window before continuing.

    Figure 1. Pblock for the inst_count Reconfigurable Partition

    Although this Reconfigurable Module only requires CLB resources, also include RAMB18, RAMB36, or DSP48 resources if the box encompasses those types. This allows the routing resources for these block types to be included in the reconfigurable region. The General view of the Pblock Properties window can be used to add these if needed. The Statistics view shows the resource requirements of the currently loaded Reconfigurable Module.

  2. Repeat the previous step for the inst_shift instance, this time targeting clock region below the first. This Reconfigurable Module includes block RAM instances, so the resource type must be included. If omitted, the RAMB details in the Statistics view will be shown in red.
  3. Run Dynamic Function eXchange Design Rule Checks by selecting Reports > Report DRC. You can uncheck All Rules and then check Dynamic Function eXchange to focus this report strictly on DFX DRCs.

    No DRC errors should be reported, as long as the inst_shift Pblock includes RAMB18 and RAMB36 resources. Advisory messages may still be reported, especially if the Pblock is located near the edge of the device. Note that for both Pblocks, SNAPPING_MODE is set to ON, as reported in the Properties view of the Pblock Properties window. This is always enabled for all UltraScale and UltraScale+ devices given the fine granularity of programmable units in this architecture.

  4. Save these Pblocks and associated properties:
    write_xdc ./Sources/xdc/top_all.xdc

    This exports all the current constraints in the design, including those imported earlier from top_io_$board.xdc. These constraints can be managed in their own XDC file or managed within a run script (as is typically done with HD.RECONFIGURABLE).

    Alternatively, the Pblock constraints themselves can be extracted and managed separately. A Tcl proc is available to help perform this task.

    1. First source the proc which is found in one of the Tcl utility files:
      source ./Tcl_HD/hd_utils.tcl
    2. Then use the export_pblocks proc to write out this constraint information:
      export_pblocks -file ./Sources/xdc/pblocks.xdc

      This writes the Pblock constraint information for both Pblocks in the design. Use the -pblocks option to select only one if desired.