The VIO core input probes are used to read values from a design that is running in an FPGA or ACAP in actual hardware. The VIO input probes are typically used as status indicators for a design-under-test. VIO debug probes need to be added manually to the VIO Probes window in the VIO Dashboard. Refer to the section called Viewing VIO Cores in the Debug Probes Window on how to do this. An example of what VIO input probes look like in the VIO Probes window of the VIO Dashboard is shown in the following figure.
Figure 1. Core Input Probes