Toggle Rate - 2022.1 English

Vivado Design Suite User Guide: Power Analysis and Optimization (UG907)

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2022.1 English

Toggle rate (%) is the rate at which the output of a synchronous logic element switches with respect to a given clock input. It is modeled as a percentage between 0 - 100%. A toggle rate of 100% means that on average the output toggles once during every clock cycle. As an example, If a signal changes at every four clock cycles with respect to a clock of any frequency, then the Toggle Rate is: (1/4)*100 = 25%.

Important: The toggle rate for clock nets is always 200%, which means that the net toggles twice in a cycle.
Tip: Ideally a synchronous net changes at the most once per clock (except DDR nets); thus the maximum toggle rate is 100%. If a synchronous net is prone to glitches, use Signal Rate to specify the switching activity.

For asynchronous elements such as nets and logic that are not synchronized with a clock, the toggle rate cannot be computed. The Vivado® power tools expect the use of Signal Rate for these kinds of elements.

By default the primary inputs of the design are not associated with a specific clock. Use the set_input_delay constraint to associate a clock with the primary inputs. If you do not associate a clock, the power tools compute the toggle rate with respect to either the capturing clock or the fastest clock in the design.