Control Set Reduction - 2022.1 English

Vivado Design Suite User Guide: Implementation (UG904)

Document ID
UG904
Release Date
2022-05-24
Version
2022.1 English

Designs with several unique control sets can have fewer options for placement, resulting in higher power and lower performance. Designs with fewer control sets have more options and flexibility in terms of placement, generally resulting in improved results. The number of unique control sets can be reduced by applying the CONTROL_SET_REMAP property to a register that has a control signal driving the synchronous set/reset pin or CE pin. This triggers the optional control set reduction phase and maps the set/reset and/or CE logic to the D-input of the register. If possible, the logic is combined with an existing LUT driving the D-input, which prevents extra levels of logic.

The CONTROL_SET_REMAP property supports the following values:

  • ENABLE - Remaps the EN input to the D-input.
  • RESET - Remaps the synchronous S or R input to the D-input.
  • ALL - Same as ENABLE and RESET.
  • NONE or unset - No optimization (Default).
Note: This optimization is automatically triggered when the CONTROL_SET_REMAP property is detected on any register.