Carry Optimization - 2022.1 English

Vivado Design Suite User Guide: Implementation (UG904)

Document ID

UG904

Release Date

2022-05-24

Version

2022.1 English

Remaps CARRY4 and CARRY8 primitives of carry chains to LUTs to improve routability. When running with the -carry_remap option, only single-stage carry chains are converted to LUTs. You can control the conversion of individual carry chains of any length by using the CARRY_REMAP cell property. The CARRY_REMAP property is an integer that specifies the maximum carry chain length to be mapped to LUTs. The CARRY_REMAP property is applied to CARRY4 and CARRY8 primitives and each CARRY primitive within a chain must have the same value to convert to LUTs. The minimum supported value is 1.

Example: A design contains multiple carry chains of lengths 1, 2, 3, and 4 CARRY8 primitives. The following assigns a CARRY_REMAP property on all CARRY8 primitives:

Vivado% set_property CARRY_REMAP 2 [get_cells -hier -filter {ref_name == CARRY8}]

After opt_design, only carry chains of length 3 or greater CARRY8 primitives remain mapped to CARRY8. Chains with a length of 1 and 2 are mapped to LUTs.

Note: Not applicable to Versal.

Tip: Remapping long carry chains to LUTs may significantly increase delay even with further optimization by adding the remap option. Xilinx recommends only remapping smaller carry chains, those consisting of one or two cascaded CARRY primitives.