Input jitter is the difference between successive clock edges with respect to variation from the nominal or ideal clock arrival times. The input jitter is an absolute value and represents variations on each side of the clock edge.
Use the set_input_jitter command to specify input jitter for each
primary clock individually. You cannot specify the input jitter on a generated clock
directly. The Vivado IDE timing engine automatically computes the
jitter that a generated clock inherits from its master clock.
- For the case in which the generated clock is driven by a MMCM or a PLL, the input jitter is replaced with a computed discrete jitter.
- For the case the generated clock is created by a combinatorial or sequential cell, the generated clock jitter is the same as its master clock jitter.