FreeRTOS Analysis using STM - 2022.1 English

Vitis Unified Software Platform Documentation: Embedded Software Development (UG1400)

Document ID
UG1400
Release Date
2022-04-26
Version
2022.1 English

The Vitis software platfrom supports collection and analysis of trace events generated by FreeRTOS based applications. Zynq UltraScale+ MPSoC processors support the Software Trace Macrocell (STM) block which is a software application driven trace source to generate a software instrumentation trace (SWIT). To collect FreeRTOS events and analyze them, do the following:

  1. Click File > New > Application Project. The New Application Project wizard appears.
  2. Type a project name into the Project Name field.
  3. Select the location for the project. You can use the default location as displayed in the Location field by leaving the Use default location check box selected. Otherwise, click the check box and type or browse to the directory location.
  4. In platform selection view, select Create a new platform from hardware (XSA) and choose zcu102 design. Click Next to proceed.
  5. Choose CPU and OS as freertos10_xilinx.
    Note: The FreeRTOS version might vary in upcoming releases.
  6. Click Next to advance to the Templates page.

    The Vitis software platform provides useful sample applications listed in the Templates page that you can use to create your project. The Description box displays a brief description of the selected sample application. When you use a sample application for your project, the Vitis software platform creates the required source and header files and linker script.

  7. Select the desired template. If you want to create a blank project, select Empty Application. You can add C files to the project after the project is created.
  8. Click the Navigate to BSP settings option in application project settings page. Select Open BSP Settings > Overview > FreeRTOS and change the value of enable_stm_event_trace to TRUE.
  9. Right-click on the application and select Debug As > Debug Configuration.
  10. In the Debug Configurations page, double-click Single Application Debug to create a launch configuration for the selected project.
  11. Click Debug. Debugging begins with the processors in the running state.
  12. Debug the project using the system debugger on the required target.
  13. Wait for project to be downloaded on to board and stop at main().
  14. Click Window > Show View > Xilinx. The Show View page appears.
  15. Select Trace Session Manager from the Show View page. The launch configuration related to the application being debugged can be seen in the Trace Session Manager view.
  16. Click the start button in the Trace Session Manager view toolbar to start the FreeRTOS trace collection.
  17. Switch to the Debug view and resume the project.
  18. Allow the project to run.
  19. Switch back to the Trace Session Manager view and stop the trace collection. All the trace data collected will be exported to suitable trace file and will be opened in Events editor and the FreeRTOS Analysis view.