Measuring Performance with RTL or HLS Monitors - 2022.1 English

Versal ACAP System Integration and Validation Methodology Guide (UG1388)

Document ID
UG1388
Release Date
2022-05-25
Version
2022.1 English

You can use custom RTL or HLS kernels to count the cycles elapsed between the start and end of AXI4-Stream transactions. In the PS application, you can read/write these counters to measure performance at run time.