The Versal Base TRD consists of a series of platforms, accelerators and Jupyter notebooks to demonstrate various aspects of the design. A platform is a Vivado design with a pre-instantiated set of I/O interfaces and a corresponding PetaLinux BSP and image that includes the required kernel drivers and user-space libraries to exercise those interfaces. Accelerators are mapped to FPGA logic resources and/or AI Engine cores and stitched into the platform using the Vitis toolchain. The reference design currently supports the VCK190 evaluation board either with ES parts or production parts.