Checking for Multi-Fanout on the Output of Read Data Registers - 2021.2 English

UltraFast Design Methodology Guide for Xilinx FPGAs and SoCs

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2021.2 English

The fanout of the data output bits from the memory array must be 1 for the second register to be absorbed by the RAM primitive. This is illustrated in the following figure.

Figure 1. Multiple Fanout Preventing Block RAM Output Register Inference