validate_bd_design - 2021.2 English

Vivado Design Suite Tcl Command Reference Guide (UG835)

Document ID
UG835
Release Date
2021-10-22
Version
2021.2 English

Run Parameter Propagation for specified design or for a specific cell.

Syntax

validate_bd_design [‑force] [‑design <arg>] [‑include_pfm] [‑steps <args>]
    [‑quiet] [‑verbose]

Returns

TCL_OK, TCL_ERROR if failed.

Usage

Name Description
[-force] Force re-run validation on the design
[-design] Design name. If not specified, run parameter propagation on current design
[-include_pfm] including validate pfm attributes on the design
[-steps] List of steps to execute. This does not put the design in a validated state. Choices: addressing,noc-drc,noc-compile
[-quiet] Ignore command errors
[-verbose] Suspend message limits during command execution

Categories

IPIntegrator

Description

Validate an IP integrator subsystem design, or IP cell or hierarchical module.

Arguments

-force - (Optional) Force validation on the block design.

-design <arg> - (Optional) The IP integrator subsystem design to validate. If not specified, the current IP integrator subsystem design is validated.

-include_pfm - (Optional) Validate the required DSA and PFM attributes on a block design created as the hardware portion of a Vitis platform. Errors will be returned if the platform properties are not properly defined.

-quiet - (Optional) Execute the command quietly, returning no messages from the command. The command also returns TCL_OK regardless of any errors encountered during execution.
Note: Any errors encountered on the command-line, while launching the command, will be returned. Only errors occurring inside the command will be trapped.
-verbose - (Optional) Temporarily override any message limits and return all messages from this command.
Note: Message limits can be defined with the set_msg_config command.

Examples

The following example validates the current IP integrator subsystem design, forcing re-validation if needed:

validate_bd_design -force