Create pins in the current design
Syntax
create_pin [‑from <arg>] [‑to <arg>] ‑direction <arg> [‑quiet] [‑verbose]
<pins>...
Usage
Name | Description |
---|---|
[-from]
|
Starting bus index |
[-to]
|
Ending bus index |
-direction
|
Pin direction Values: IN, OUT, INOUT |
[-quiet]
|
Ignore command errors |
[-verbose]
|
Suspend message limits during command execution |
<pins>
|
Names of pins to create |
Categories
Description
Add single pins or bus pins to the current netlist of an open Synthesized or Implemented Design. You may define attributes of the pin such as direction and bus width, as well as the pin name.
Bus pins can be created with increasing or decreasing bus indexes, using negative and positive index values.
create_port
command. If the instance name of a cell is not specified as part of the pin name, an error will be returned.
write_checkpoint
command, or may be exported to a netlist file such as Verilog, VHDL, or EDIF, using the appropriate write_*
command.
Arguments
-from <arg>
- (Optional) The starting index of a bus pin.
-to <arg>
- (Optional) The ending index of a bus pin.
-direction
- (Required) The direction of the pin. Valid values are IN, OUT, and INOUT.
-quiet
- (Optional) Execute the command quietly, returning no messages from the command. The command also returns TCL_OK regardless of any errors encountered during execution.
-verbose
- (Optional) Temporarily override any message limits and return all messages from this command.
set_msg_config
command.<pins> - (Required) The name of the pins to create. You must specify the pin names hierarchically from the cell instance the pin is assigned to. Pins created at the top-level of the design are ports, and should be created with the create_port
command.
Examples
create_pin -direction IN cpuEngine/inPin
set_hierarchy_separator |
create_cell -reference dmaBlock -black_box usbEngine0|myDMA
create_pin -direction INOUT -from 0 -to 23 usbEngine0|myDMA|dataBus