The following table covers all features and functionality of the FIR IP. Features and functionality not described in this table are not supported in the Vitis HLS implementation.
Parameter | C Type | Default Value | Valid Values |
---|---|---|---|
input_width | unsigned | 16 | No limitation |
input_fractional_bits | unsigned | 0 | Limited by size of input_width |
output_width | unsigned | 24 | No limitation |
output_fractional_bits | unsigned | 0 | Limited by size of output_width |
coeff_width | unsigned | 16 | No limitation |
coeff_fractional_bits | unsigned | 0 | Limited by size of coeff_width |
num_coeffs | bool | 21 | Full |
coeff_sets | unsigned | 1 | 1-1024 |
input_length | unsigned | 21 | No limitation |
output_length | unsigned | 21 | No limitation |
num_channels | unsigned | 1 | 1-1024 |
total_num_coeff | unsigned | 21 | num_coeffs * coeff_sets |
coeff_vec[total_num_coeff] | double array | None | Not applicable |
filter_type | unsigned | single_rate | single_rate, interpolation, decimation, hilbert_filter, interpolated |
rate_change | unsigned | integer | integer, fixed_fractional |
interp_rate | unsigned | 1 | 1-1024 |
decim_rate | unsigned | 1 | 1-1024 |
zero_pack_factor | unsigned | 1 | 1-8 |
rate_specification | unsigned | period | frequency, period |
hardware_oversampling_rate | unsigned | 1 | No Limitation |
sample_period | bool | 1 | No Limitation |
sample_frequency | unsigned | 0.001 | No Limitation |
quantization | unsigned | integer_coefficients | integer_coefficients, quantize_only, maximize_dynamic_range |
best_precision | unsigned | false |
false true |
coeff_structure | unsigned | non_symmetric | inferred, non_symmetric, symmetric, negative_symmetric, half_band, hilbert |
output_rounding_mode | unsigned | full_precision | full_precision, truncate_lsbs, non_symmetric_rounding_down, non_symmetric_rounding_up, symmetric_rounding_to_zero, symmetric_rounding_to_infinity, convergent_rounding_to_even, convergent_rounding_to_odd |
filter_arch | unsigned | systolic_multiply_accumulate | systolic_multiply_accumulate, transpose_multiply_accumulate |
optimization_goal | unsigned | area | area, speed |
inter_column_pipe_length | unsigned | 4 | 1-16 |
column_config | unsigned | 1 | Limited by number of DSP macrocells used |
config_method | unsigned | single | single, by_channel |
coeff_padding | bool | false | false true |