You can find a separate 7 series folder containing the 7 series tutorial design files in the contents of the zip file.
The following table describes the contents of the 7 series tutorial design files:
| Directories/Files | Description |
|---|---|
| /src | Contains the design HDL and testbench for the functional simulation. |
| /src/dut_fpga.v | Top module for the design. |
|
/src/bram_tdp.v /src/bram_top.v /src/dut.v |
Other design blocks - synthesized module. |
| dut_fpga_kc705.xdc | Contains clocking and timing constraints for the design. |
| /src/testbench.v | Testbench for simulating the design. |