Using the ECO Flow to Replace Debug Probes Post Implementation - 2021.1 English

This simple tutorial shows you how to replace nets connected to an ILA core in a placed and routed design checkpoint using the Vivado® Design Suite Engineering Change Order (ECO) flow.

1. Open the Vivado® Design Suite, and select File > Open Checkpoint.
   
   
2. Open the routed checkpoint that you created in Using the HDL Instantiation Method to Debug a Design.
   
   

   Change the layout in the Vivado Design Suite toolbar dropdown to ECO.

   
   
   
   Note: The Flow Navigator window now changes to ECO Navigator with a different set of options.
   
   
   
3. In the ECO Navigator window, click Replace Debug Probes to bring up the Replace Debug Probes dialog box. Note the Debug Hub and ILA cores in the design.
   
   
   Important: Xilinx strongly recommends that you do not replace the clock nets associated with ILA and Debug Hub cores.
4. In the Replace Debug Probes dialog box, highlight the probes whose nets you want to change. In this lab we will replace the GPIO_BUTTONS_dly[0] net that is being probed.
5. Click the Edit Probes button to the right of the GPIO_BUTTONS_dly[0] probe net to bring up the Choose Nets dialog box.
   
   
6. In the Choose Nets dialog box, choose the U_DEBOUNCE_0/clear net to replace the existing GPIO_BUTTONS_dly[0] probe net. Click OK.
   
   
7. Type for “*clear net” in the Name field and Click Find. Notice the U_DEBOUNCE_0 net in the Found nets area. Select U_DEBOUNCE_0/clear net using the “->” arrow and click OK. The U_DEBOUNCE_0/clear net to replaces the existing GPIO_BUTTONS_dly[0] probe net.
   
   
   
   
8. Now click OK in the Replace Debug Probes dialog. An additional dialog box may appear if the nets were marked with DONT_TOUCH indicating that it must be removed to proceed. If so, click Unset Property and Continue.
   
   
   Important: Check the Tcl Console to ensure that there are no Warnings/Errors.