Navigating Content by Design Process - 2021.1 English

Xilinx® documentation is organized around a set of standard design processes to help you find relevant content for your current development task. All Versal™ ACAP design process Design Hubs can be found on the Xilinx.com website. This document covers the following design processes:

Hardware, IP, and Platform Development​

Creating the PL IP blocks for the hardware platform, creating PL kernels, functional simulation, and evaluating the Vivado® timing, resource use, and power closure. Also involves developing the hardware platform for system integration. Topics in this document that apply to this design process include:

• Vivado Software Flow
• Vivado Project Flow
• Design Considerations and Guidelines for All Xilinx Devices
• Design Considerations and Guidelines for 7 Series and Zynq Devices
• Design Considerations and Guidelines for UltraScale and UltraScale+ Devices

Board System Design

Designing a PCB through schematics and board layout. Also involves power, thermal, and signal integrity considerations. Topics in this document that apply to this design process include:

• Configuring the Device