Path from Internal Sequential Cell to Output Port - 2021.1 English

Vivado Design Suite User Guide: Design Analysis and Closure Techniques (UG906)

Document ID
Release Date
2021.1 English

In a path from an internal sequential cell to an output port, the data:

  • Is launched inside the device by a sequential cell, which is clocked by the source clock.
  • Propagates through some internal logic before reaching the output port.
  • Is captured by a clock on the board after an additional delay called the output delay (SDC definition).