xelab Examples - 2021.1 English

Vivado Design Suite User Guide: Logic Simulation (UG900)
Document ID
UG900
Release Date
2021-06-16
Version
2021.1 English
xelab work.top1 work.top2 -s cpusim
xelab lib1.top1 lib2.top2 -s fftsim
xelab work.top1 work.top2 -prj files.prj -s pciesim
xelab lib1.top1 lib2.top2 -prj files.prj -s ethernetsim