Package Trace Length‌ - 2021.1 English - UG899

Vivado Design Suite User Guide: I/O and Clock Planning (UG899)
Document ID
UG899
Release Date
2021-03-09
Version
2021.1 English
Instead of giving trace length data, Vivado Design Suite provides trace delay data, which is the most accurate way to estimate package delay.
  1. Open a design in Vivado, either RTL, netlist or implemented.
  2. Select File > Export > Export I/O Ports for a CSV type spreadsheet that shows the min and max package delays for each pin. The min/max trace delays are also displayed in the Package Pins window for every package pin within two separate columns.
  3. The following Tcl commands can be used if there is no project:
    link_design -part <part_number>
write_csv <file_name>

    For example:

    link_design -part xc7k410tffg900-2
write_csv flight_time