Step 2: Create a Vivado Project using Model Composer HDL IP - 2021.1 English

Vitis Model Composer Tutorial: (UG1498)

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2021.1 English
In this step you create a Vivado project which you will use to create your hardware design.
  1. Double-click the System Generator token to open the Properties Editor.
  2. In the Properties Editor, make sure IP catalog is selected for the Compilation type.
  3. Click Generate to generate a design in IP catalog format.
  4. Click OK to dismiss the Compilation status dialog box.
  5. Click OK to dismiss the System Generator token.

    The design has been written in IP catalog format to the directory ./IPI_Project. You will now import this IP into the Vivado IP catalog and use the IP in an existing example project.

  6. Open the Vivado IDE using Windows > Xilinx Design Tools > Vivado 2021.1.
  7. Click Create Project.
  8. Click Next.
  9. Enter \HDL_Library\Lab5\IPI_Project for the Project Location.
    Tip: You will have to manually type /IPI_Project in the Project location box to create the IPI_Project directory.

  10. Click Next.
  11. Select both RTL Project and Do not specify sources at this time and click Next.
  12. Select Boards and ZYNQ-7 ZC702 Evaluation Board as shown in the next figure.

  13. Click Next.
  14. Click Finish.

You have now created a Vivado project based on the ZC702 evaluation board.