- Launch Model Composer and open the
Lab2_3.slx
file in the Lab2/C_code folder. This should open the model as shown in the following figure.
- Add a Vitis HLS block:
- Right-click anywhere on the canvas workspace.
- Select Xilinx BlockAdd.
- Type
Vitis HLS
in the Add block dialog box. - Select Vitis HLS as shown in the following figure.
- Double-click the Vitis HLS block to open the Properties Editor.
- Use the Browse button to select the solution created by Vitis HLS in Step 1, at \HDL_Library\Lab2\C_code\hls_project\solution1, as shown in the following figure.
- Click OK to import the Vitis HLS
IP.
- Connect the input and output ports of the block as shown in the
following figure.
- Navigate into the Noisy Image sub-system and double-click the Image From File block to open the Block Parameters dialog box.
- Use
the Browse button to ensure the file name correctly
points to the file xilinx_logo.jpg as shown
in the following figure.
- Click OK to exit the Block Parameters dialog box.
- Use the Up to Parent toolbar button to return to the top level.
- Save the design.
- Simulate the design and verify the image is filtered, as shown
in the following figures.