Define the XSK_EFUSEPL_DRIVER macro to use the PL eFUSE. After defining the macro, provide the inputs defined with XSK_EFUSEPL_DRIVER to burn the bits in PL eFUSE bits. If the bit is to be burned, define the macro as TRUE; otherwise define the macro as FALSE. The table below lists the user-configurable PL eFUSE parameters for Zynq devices.
| Macro Name | Description |
|---|---|
| XSK_EFUSEPL_FORCE_PCYCLE_RECONFIG | Default = FALSE If the value is set to TRUE, then the part has to be power-cycled to be reconfigured. FALSE does not set the eFUSE control bit. |
| XSK_EFUSEPL_DISABLE_KEY_WRITE | Default = FALSE TRUE disables the eFUSE write to FUSE_AES and FUSE_USER blocks. FALSE does not affect the EFUSE bit. |
| XSK_EFUSEPL_DISABLE_AES_KEY_READ | Default = FALSE TRUE disables the write to FUSE_AES and FUSE_USER key and disables the read of FUSE_AES. FALSE does not affect the eFUSE bit. |
| XSK_EFUSEPL_DISABLE_USER_KEY_READ | Default = FALSE. TRUE disables the write to FUSE_AES and FUSE_USER key and disables the read of FUSE_USER. FALSE does not affect the eFUSE bit. |
| XSK_EFUSEPL_DISABLE_FUSE_CNTRL_WRITE | Default = FALSE. TRUE disables the eFUSE write to FUSE_CTRL block. FALSE does not affect the eFUSE bit. |
| XSK_EFUSEPL_FORCE_USE_AES_ONLY | Default = FALSE. TRUE forces the use of secure boot with eFUSE AES key only. FALSE does not affect the eFUSE bit. |
| XSK_EFUSEPL_DISABLE_JTAG_CHAIN | Default = FALSE. TRUE permanently disables the Zynq ARM DAP and PL TAP. FALSE does not affect the eFUSE bit. |
| XSK_EFUSEPL_BBRAM_KEY_DISABLE | Default = FALSE. TRUE forces the eFUSE key to be used if booting Secure Image. FALSE does not affect the eFUSE bit. |